The HM X300 are high-performance, scalable software defined radio (SDR) platforms for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended bandwidth daughterboard slots covering DC - 6 GHz with up to 160MHz of baseband bandwidth, multiple high-speed interface options (PCIe, Dual 1/10 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor. In addition to providing best-in-class hardware performance, the open source software architecture of the HM X300 provides cross-platform UHD driver support making it compatible with a large number of USRP supported development frameworks, reference architectures, and open source projects.
HM X300
1. Product Overview
The HM X300 are high-performance, scalable software defined radio (SDR) platforms for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended bandwidth daughterboard slots covering DC - 6 GHz with up to 160MHz of baseband bandwidth, multiple high-speed interface options (PCIe, Dual 1/10 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor. In addition to providing best-in-class hardware performance, the open source software architecture of the HM X300 provides cross-platform UHD driver support making it compatible with a large number of USRP supported development frameworks, reference architectures, and open source projects.
2. SAMPLE APPLICATIONS
Advanced Wireless Prototyping (WiFi/Cellular)
Massive MIMO Testbeds
Passive RADAR
Signals Intelligence
3. Features
3.1 Two wideband RF daughterboard slots
Up 160MHz bandwidth per channel
Selection covers DC to 6 GHz
3.2 Large, customizable Kintex-7 FPGA
HM X300 - XC7K325T
HM X310 - XC7K410T
3.3 UHD architecture provides compatibility:
GNU Radio
C++ API/Python
Other third-party frameworks & applications
3.4 Multiple high-speed interfaces
Dual SFP(+) ports for 1/10 Gigabit Ethernet
PCIe x4
3.5 Flexible clocking architecture
Configurable sample clock
Optional GPS-disciplined OCXO
Coherent operation with 10 MHz/1 PPS
3.6 Compact and rugged half-wide 1U form factor
4. Specifications
Power | |
DC Input | 12 V |
Power Consumption (2x UBX-160) | 45 W |
Conversion and Clock Performance | |
ADC Sample Rate (max) | 200 MS/s |
ADC Resolution | 14 bits |
DAC Sample Rate (max) | 800 MS/s |
DAC Resolution | 16 bits |
Host Sample Rate (16b) | 2.5 ppm |
Internal Reference Accuracy | 20 ppb |
RF Performance (with UBX-160) | |
Receiver | |
RX Noise Figure (50 MHz - 4 GHz) | < 5 dB |
IQ Imbalance | < -30 dBm |
RX IIP3 (>35MHz) | 8 - 13 dBm |
Transmitter | |
< 3.5 GHz | > 18 dBm |
6 GHz | > 5.5 dBm |
Physical | |
Dimensions (half-wide, 1U) | 26.7 × 21.8 × 4.1 cm |
Weight (w/ 2x UBX-160) | 1.6 kg |
