HM X410 is a high-performance, multi-channel software-defined radio. The SDR is designed for frequencies from 1 MHz to 7.2 GHz, tunable up to 8 GHz and features a two-stage superheterodyne architecture with 4 independent TX and RX channels capable of 400 MHz of instantaneous bandwidth each.
Digital interfaces for data offload and control include two QSFP28 interfaces capable of 100 GbE, a PCIe Gen3 x8 interface, as well standard command, control, and debug interfaces: USB-C JTAG, USB-C console, Ethernet 10/100/1000.
HM X410 is an all-in-one device built on the Xilinx Zynq Ultrascale+ ZU28DR RF System on Chip (RFSoC) with built-in digital up and down conversion and onboard Soft-Decision Forward Error Correction (SD-FEC) IP.
Product Details
1. Product Overview
HM X410 is a high-performance, multi-channel software-defined radio. The SDR is designed for frequencies from 1 MHz to 7.2 GHz, tunable up to 8 GHz and features a two-stage superheterodyne architecture with 4 independent TX and RX channels capable of 400 MHz of instantaneous bandwidth each.
Digital interfaces for data offload and control include two QSFP28 interfaces capable of 100 GbE, a PCIe Gen3 x8 interface, as well standard command, control, and debug interfaces: USB-C JTAG, USB-C console, Ethernet 10/100/1000.
HM X410 is an all-in-one device built on the Xilinx Zynq Ultrascale+ ZU28DR RF System on Chip (RFSoC) with built-in digital up and down conversion and onboard Soft-Decision Forward Error Correction (SD-FEC) IP.
2. Key Features
RF parameters | •Four full-duplex channels, with a maximum bandwidth of 400 MHz per channel • 1 MHz to 7.2 GHz frequency range (tunable up to 8 GHz) • Superheterodyne architecture for the RF front end • Transmit and receive frequencies are independently tunable on all channels
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Programmable System | • 4-core ARM Cortex-A53 processor, with a maximum clock speed of 1200 MHz • 4GB DDR4 memory |
Programmable Logic | • RFSoC ZU28DR FPGA • 2-channel 4GB DDR4 memory |
Software Development | • UHD (version not lower than 4.1) • RFNoC • GNU Radio • C/C++ • Python • OpenEmbedded Linux on A53 • NI-USRP (version not lower than NI-USRP 20.8) • LabVIEW (version not lower than LabVIEW 2020) •LabVIEW FPGA (version not lower than LabVIEW FPGA 2020) |
Synchronous interface | • REF IN • PPS IN • TRIG IN/OUT • Built-in GPSDO • Built-in voltage-controlled OCXO |
Data Interface | • Two QSFP28 ports (10 Gigabit Ethernet, 100 Gigabit Ethernet, Aurora) • Two iPass+™ zHD® Interfaces (PCIe Gen3 x 8) • Ethernet interface (1Gbps, connected to PS) •2 USB Type C ports (USB 3.0, compatible with Console/JTAG) • Two FPGA Programmable GPIO Interfaces (HDMI)
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Power | 12 V DC, maximum current 16 A |
Dimensions | • half-wide RU form factor • 28.5 cm × 22.2 cm × 4.4 cm |
3. Baseband Specifications
PS | |
CPU | 4-core ARM Cortex-A53 processor, up to 1200 MHz |
Memory | 4 GB DDR4, up to 2.4 GT/s |
NVM | 32 GB eMMC (supporting Pseudo SLC) |
RJ45 port | Gigabit Ethernet protocol |
USB Type C port | USB 3.0, Connect to PS, USB Console/JTAG, etc |
PL | |
FPGA | Xilinx RFSoC XCZU28DR Speed Grade -1 |
Memory | 2×4GB DDR4 memory, up to 2.4 GT/s |
SD-FEC core | 8 |
QSFP28 port | 2 x 4 lanes, 10 Gigabit Ethernet, 100 Gigabit Ethernet, Aurora |
iPass+ zHD port | 2 x 4 lanes, PCIe Gen3 x8 |
GPIO | 2 FPGA programmable GPIO interfaces (HDMI); Each interface supports 12 I/O lines; Maximum data rate: 100 Mbps; Voltage levels support 3.3 V, 2.5 V, and 1.8 V |
TRIGGER | SMA interface, trigger signal I/O level 3.3 V |
Data Processing & Transmission | |
Sample Rate(Maximum) | 500 Msps |
Channels | 4 |
ADC Resolution | 12 bit |
DAC Resolution | 14 bit |
4. RF Specifications
Transmitter | |
Number of TX channels | 4 |
Frequency range | 1 MHz to 7.2 GHz frequency range (tunable up to 8 GHz) |
Frequency step | <1 Hz |
Maximum output power | <23 dBm |
TX/RX switching time | 0.3 μs |
TX gain switching time | 1 μs |
Gain range | 60 dB (typical) |
Gain step | 1 dB (typical) |
Noise Figure | -91 dBc/Hz @ 1 kHz -101 dBc/Hz @ 10 kHz -103 dBc/Hz @ 100 kHz |
Maximum instantaneous bandwidth | 400 MHz |
Average noise density | -146 dBm/Hz |
Receiver | |
Number of RX channels | 4 |
Frequency range | 1 MHz to 7.2 GHz frequency range (tunable up to 8 GHz) |
Frequency step | <1 Hz |
Gain range | 38 dB (typical) (≤500 MHz) 60 dB (typical) (>500 MHz) |
Gain step | 1 dB (typical) |
Maximum input power | 0 dBm |
RX gain switching time | 0.3 μs |
IIP3（0 dBmInput） | +12 dBm |
Maximum instantaneous bandwidth | 400 MHz |
Noise Figure | 8 dB @ (500 MHz – 3.1 GHz) 6.5 dB @ (3.1 GHz – 6 GHz) 9 dB @ (6 GHz – 8 GHz) |
5. GPSDO Specifications
OCXO frequency accuracy | 2.5ppm (unlocked from GPS) 5ppb (locked to GPS) |
Antenna frequency | L1 C/A，1575.42MHz |
Feed voltage | 3.3V |
Feed power | 0.19W |
6. Power Specifications
Voltage | 12 V, DC |
Current | 7 A – 16 A |
Power | >190 W |
7. Physical Specifications
Dimensions
| 26.7 cm × 22.2 cm × 4.4 cm |
Dimensions (including connectors)
| 28.5 cm × 22.2 cm × 4.4 cm |
Weight | 2.7 kg |
8. Environmental Specifications
Operating temperature | 0 °C - 55 °C |
Storage temperature | -40 °C - 71 °C |
Operating humidity | 10 % - 90 %, non-condensing |
Storage humidity | 5 % - 95 %, non-condensing |
